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Oswaldo Cadenas

Dr Oswaldo Cadenas

Head of Electrical and Electronic Engineering

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  • Telephone:
    020 7815 7589
  • School/Division:
    Engineering / Electrical and Electronic Engineering

Dr Oswaldo Cadenas is a Senior Lecturer in the division of Electrical and Electronics in the School of Engineering. He specialises in digital system design to build faster hardware parallel architectures. He also researches in faster computations for data science applications. He teaches digital circuit techniques, electronic engineering and machine learning.

He started as an academic in ULA, Venezuela, where he was born and raised. He moved into the UK for a PhD degree gained in 2001 and he had teaching and research positions at University of Reading and Kent University at Canterbury.

    • Introduction to Digital Electronics
    • Digital Logic Design
    • Machine Learning

Dr. Cadenas has been a researcher in the area of digital hardware parallel architectures and in algorithms for hardware architectures with over 60 peer-reviewed publications.

His research deals with exploiting parallel processing techniques commonly used in hardware into software contexts. This means a deep understanding of the digital design process cycle, going through hardware description languages to specify designs (VHDL + Verilog), through their verification with SystemVerilog verification methodologies and their prototyping with FPGA technology. On the software side, this requires a solid knowledge of the fundamentals of algorithms and the formulation of novel parallel algorithms techniques aiming at deploying solutions using either multi-core or GPU computing to accelerate computations.

View my publications at

Dr. Cadenas has been involved with consultancy for commercial enterprises. Some of his designs have run and still run inside machinery tools used worldwide.